0 [{"id":193019,"quiz_id":"11602","answer_id":null,"answerType_id":"2","created_at":"2017-04-25 16:17:00","updated_at":"2017-04-25 16:17:00","questionName":"CPU components","questionTimeSeconds":"0","questionTimeMinutes":"2","questionImagePath":null,"position":null,"explanation":"","question_score_id":null,"lang":null,"questionAudioPath":null},{"id":193032,"quiz_id":"11602","answer_id":null,"answerType_id":"3","created_at":"2017-04-25 16:25:09","updated_at":"2017-04-25 16:25:09","questionName":"What's the order of the Fetch Execute Cycle?","questionTimeSeconds":"0","questionTimeMinutes":"2","questionImagePath":null,"position":null,"explanation":"","question_score_id":null,"lang":null,"questionAudioPath":null},{"id":193029,"quiz_id":"11602","answer_id":null,"answerType_id":"2","created_at":"2017-04-25 16:21:57","updated_at":"2017-04-25 16:21:57","questionName":"Types of registers","questionTimeSeconds":"0","questionTimeMinutes":"2","questionImagePath":null,"position":null,"explanation":"","question_score_id":null,"lang":null,"questionAudioPath":null}]

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CPU components

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Control Unit
ALU
Memory Unit
Data Bus
Address bus
Control bus

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Holds data and instructions for processing. Stores data currently in use, the boot program, operations and instructions.
Carries the address of the memory location being read or written to. The wider this bus is, the larger the max amount of primary storage.
Used to carry out the instructions received by the processor and produce the processed output. Carries out arithmetic instructions and logical instructions.
Manages execution of instructions by using signals sent to other parts of the computer. Synchronises instructions by using the in-built clock and controls the fetch-execute cycle.
Transmits control signals from the control unit to the rest of the processor. Allows synchronisation of signals and commands.
Transmits control signals from the control unit to the rest of the processor. Allows synchronisation of the signals and commands.

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What's the order of the Fetch Execute Cycle?

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1
2
3
4
5
6
7
8

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Contents of MDR transferred to CIR.
Result stored in accumulator.
Contents of the PC transferred to the MAR.
PC incremented.
Execute instruction by relevant part of the processor.
PC is incremented.
Instructions in CIR decoded.
Contents of addressed memory location moved into the MDR using data bus.

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Types of registers

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Program counter
Memory Address Register
Memory Data Register
Current Instruction Register
Accumulator

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Contents of the address specified in the MAR are copied to here. May be an instruction or data to be used with an instruction.
Holds the instruction while it's being decoded + executed. Contents of the MDR are copied to hre if it's an instruction.
Stores address of next instruction. Controls the sequence in which instructions are executed. It's incremented after being read.
Holds the address in memory of the location containing the next piece of data to be read/next instruction to be used.
Holds data currently being processed. Results of processing and arithmetic carried out in the ALU are stored here.

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