Index addressing

Indirect register

Register direct

indirect autoincrement

The execution of an instruction requires one machine cycle.

An instruction is executed in one clock cycle.

A machine cycle requires a fixed number of clock cycles.

CPU speed is measured by machine cycles.

XT2

XT1

DCO

VLO

Use the copy of R4 for ISR.

Just use it.

Push it to stack before using it, and pop it out after done.

None of the above

8

16

48

32

RETI is used for subroutine whereas RET is used for ISR.

RETI is not emulated whereas RET is emulated.

RETI pops one register whereas RET pop two registers from stack.

None of the above

Peripherals should be switched on only when needed.

All of the above

Avoid frequent subroutine and function calls due to overhead.

For longer software routines, single-cycle CPU registers should be used.

Use low-power integrated peripheral modules in place of software driven functions.

Buffering

Interrupt

Timer

Memory map